CSE/ESE 560M: Computer Systems Architecture I - Fall 2005

Washington University in St. Louis

Department of Computer Science and Engineering

Course Web Site

    http://www.arl.wustl.edu/~young/cse560m

Instructor   

Young Cho, Ph.D. Department of Computer Science & Engineering Washington University in St. Louis One Brookings Drive, Campus Box 1045 St. Louis, Missouri 63130-4899 e-mail: young AT arl.wustl.edu

Grader (TA)

Michael Sorensen Office Hours: Mon 11-12pm & 1-2:30pm                      Tues 4-6pm                      Wed 11-2:30pm Location: Urbauer 116 e-mail: mes1 AT cec.wustl.edu

Announcements

December 27, 2005: Have a Merry Christmas and Happy New Year!

Course Description

Formerly CS 521M. An exploration of the central issues in computer architecture: instruction set design, addressing and register set design, control unit design, microprogramming, memory hierarchies (cache and main memories, mass storage, virtual memory), pipelining, bus organization, RISC (Reduced Instruction Set Computers), and CISC (Complex Instruction Set Computers). Architecture modeling and evaluation using VHDL and/or instruction set simulation.

Prerequisites

 CSE 361S/CS 306S and CSE 260M

Times and Location

Lecture: Tuesday and Thursday 2:30 PM – 4:00 PM in Cupples II – Room 200/Urbauer - Room 116

Text book

J. Hennessy and D. Patterson, Computer Architecture: A Quantitative Approach, Third edition, Morgan-Kaufmann, 2003. (ISBN: 1-55860-724-2).

(Optional) D. Patterson and J. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Third Edition.

(Optional) P. Ashenden, The Student's Guide to VHDL, Morgan-Kaufmann, 2003. (ISBN: 1-55860-520-7).

General Overview of the Course : Three Parallel Tracks

   1.  Lectures - It is a very fast paced course.  It is highly recommended that you do not miss a lecture

    2.  Literature Survey

Everyone is required to read and submit Q&A for the first 6 Literature Surveys during the first 4 weeks.

For the rest of the semester, you have two choices:

(A) If you are taking the historical route for the course, you are to read 10 out 18 of the following list and write one page summary.

(B) If you are taking the advanced route, you are to read, at least, 10 papers relevant to your final project - no summaries are necessary.

7. R10000
8. Multiple Arithmetic Units
9. Instruction Issue Logic
10. Micro-architecture Issues
11. VLIW
12. Itanium Architecture
13. Cell Processor
14. Memory Consistency
15. Simultaneous Multithreading
16. Precise Interrupts
17. RAID
18. Myrinet
19. Networks of Workstations
20. Characterizing Net Procs
21. Mosaic C Multicomputer
22. Future of FPGAs 
23. Low Power Scheduling
24. HW/SW Codesign

   3.  Project - There will be assignments for the project every week which will eventually conglomerate into a customized final project

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Grading Policy

• Class Participation ........... 10%

• Survey Homework .......... 20%

• Quizzes .......................... 20%

• Final Exam/Project .......... 50%

Late Policy

As a general rule, late work will not be accepted. Special arrangements, either due to emergencies or made well in advance, will be considered individually.

Academic Integrity

You are expected to maintain the highest standards of academic integrity and refrain from the forms of misconduct spelled out in the University Academic Integrity Policy, which is published in full in Bearings and elsewhere. Violations will lead to disciplinary action and may result in suspension or expulsion from the University. Students and faculty have an obligation to uphold the highest standards of scholarship. Plagiarism or other forms of cheating are not tolerated. When a student has violated the standards of the academic community, an instructor may recommend that the student be brought before a disciplinary committee.

Additional Links

• Computer Architecture Web Page

• Xilinx Webpack Register/Download Page

• Disability Resources

Course Calendar